MSP430 Instruction Set
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Instruction
 
0 0 0 1 0 0 opcode B/W As register Single-operand arithmetic
0 0 0 1 0 0 0 0 0 B/W As register RRC Rotate right (1 bit) through carry
0 0 0 1 0 0 0 0 1 0 As register SWPB Swap bytes
0 0 0 1 0 0 0 1 0 B/W As register RRA Rotate right (1 bit) arithmetic
0 0 0 1 0 0 0 1 1 0 As register SXT Sign extend byte to word
0 0 0 1 0 0 1 0 0 B/W As register PUSH Push value onto stack
0 0 0 1 0 0 1 0 1 0 As register CALL Subroutine call; push PC and move source to PC
0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 RETI Return from interrupt; pop SR then pop PC
 
0 0 1 condition 10-bit signed offset Conditional jump; PC = PC + 2×offset
0 0 1 0 0 0 10-bit signed offset JNE/JNZ Jump if not equal/zero
0 0 1 0 0 1 10-bit signed offset JEQ/JZ Jump if equal/zero
0 0 1 0 1 0 10-bit signed offset JNC/JLO Jump if no carry/lower
0 0 1 0 1 1 10-bit signed offset JC/JHS Jump if carry/higher or same
0 0 1 1 0 0 10-bit signed offset JN Jump if negative
0 0 1 1 0 1 10-bit signed offset JGE Jump if greater or equal
0 0 1 1 1 0 10-bit signed offset JL Jump if less
0 0 1 1 1 1 10-bit signed offset JMP Jump (unconditionally)
 
opcode source Ad B/W As destination Two-operand arithmetic
0 1 0 0 source Ad B/W As destination MOV Move source to destination
0 1 0 1 source Ad B/W As destination ADD Add source to destination
0 1 1 0 source Ad B/W As destination ADDC Add source and carry to destination
0 1 1 1 source Ad B/W As destination SUBC Subtract source from destination (with carry)
1 0 0 0 source Ad B/W As destination SUB Subtract source from destination
1 0 0 1 source Ad B/W As destination CMP Compare (pretend to subtract) source from destination
1 0 1 0 source Ad B/W As destination DADD Decimal add source to destination (with carry)
1 0 1 1 source Ad B/W As destination BIT Test bits of source AND destination
1 1 0 0 source Ad B/W As destination BIC Bit clear (dest &= ~src)
1 1 0 1 source Ad B/W As destination BIS Bit set (logical OR)
1 1 1 0 source Ad B/W As destination XOR Exclusive or source with destination
1 1 1 1 source Ad B/W As destination AND Logical AND source with destination (dest &= src)

B/W:  0 = 16-bit, 1 = 8-bit
register: 0-15 for R0-R15 respectively

MSP430 Addressing Modes
As Register Syntax Description
00 n Rn Register direct. The operand is the contents of Rn.
01 n x(Rn) Indexed. The operand is in memory at address Rn+x.
10 n @Rn Register indirect. The operand is in memory at the address held in Rn.
11 n @Rn+ Indirect autoincrement. As above, then the register is incremented by 1 or 2.
 
Addressing modes using R0 (PC)
01 0 (PC) LABEL Symbolic. x(PC) The operand is in memory at address PC+x.
11 0 (PC) #x Immediate. @PC+ The operand is the next word in the instruction stream.
 
Addressing modes using R2 (SR) and R3 (CG), special-case decoding
01 2 (SR) &LABEL Absolute. The operand is in memory at address x.
10 2 (SR) #4 Constant. The operand is the constant 4.
11 2 (SR) #8 Constant. The operand is the constant 8.
00 3 (CG) #0 Constant. The operand is the constant 0.
01 3 (CG) #1 Constant. The operand is the constant 1. There is no index word.
10 3 (CG) #2 Constant. The operand is the constant 2.
11 3 (CG) #−1 Constant. The operand is the constant −1.
       
Ad Register Syntax Description
0 n Rn Register direct. The operand is the contents of Rn.
1 n x(Rn) Indexed. The operand is in memory at address Rn+x.
 

MSP430 Emulated Instructions
Emulated Actual Description
ADC.x dst ADDC.x #0,dst Add carry to destination
BR dst MOV dst,PC Branch to destination
CLRC BIC #1,SR Clear carry bit
CLRN BIC #4,SR Clear negative bit
CLRZ BIC #2,SR Clear zero bit
DADC.x dst DADD.x #0,dst Decimal add carry to destination
DEC.x dst SUB.x #1,dst Decrement
DECD.x dst SUB.x #2,dst Double decrement
DINT BIC #8,SR Disable interrupts
EINT BIS #8,SR Enable interrupts
INC.x dst ADD.x #1,dst Increment
INCD.x dst ADD.x #2,dst Double increment
INV.x dst XOR.x #−1,dst Invert
NOP MOV #0,R3 No operation
POP dst MOV @SP+,dst Pop from stack
RET MOV @SP+,PC Return from subroutine
RLA.x dst ADD.x dst,dst Rotate left arithmetic (shift left 1 bit)
RLC.x dst ADDC.x dst,dst Rotate left through carry
SBC.x dst SUBC.x #0,dst Subtract borrow (1−carry) from destination
SETC BIS #1,SR Set carry bit
SETN BIS #4,SR Set negative bit
SETZ BIS #2,SR Set zero bit
TST.x dst CMP.x #0,dst Test destination